Generic Computer

Generic Computer Diagram

Group Name: Performance Modeling
Directory: perfmod

Description

The GenericComputer device models the basic functioning of a computer and collects statistics. The GenericComputer is designed to behave similarly to any real computer but it simulates a compute operation with a representative delay instead of an actual computation. GenericComputers are driven by program files (usually from compiled DFGs) or instruction lines.

Instructions may be associated with a particular process in the GenericComputer. If there exist multiple processes in a GenericComputer, the GenericComputer will interleave execution of instructions from different processes. This concept is known multitasking. The way in which the GenericComputer chooses the next process to execute instructions from is known as scheduling. The default scheduler in the GenericComputer will schedule based on the priority of the instructions. The default scheduler will preempt (interrupt) the current instruction if a higher priority instruction is send to the processor.


Ports

    Input

    Output



Attributes

Output




Generic CPU

Generic CPU Diagram

Group Name: Performance Modeling
Directory: perfmod

Description

The GenericCPU device models the basic functioning of a computer and collects statistics. The GenericCPU is designed to behave similarly to any real computer but it simulates a compute operation with a representative delay instead of an actual computation. GenericCPUs are driven by program files (usually from compiled DFGs) or instruction lines.

Instructions may be associated with a particular process in the GenericCPU. If there exist multiple processes in a GenericCPU, the GenericCPU will interleave execution of instructions from different processes. This concept is known multitasking. The way in which the GenericCPU chooses the next process to execute instructions from is known as scheduling. The default scheduler in the GenericCPU will schedule based on the priority of the instructions. The default scheduler will preempt (interrupt) the current instruction if a higher priority instruction is send to the processor.


Ports

    Input

    Output



Attributes

Output




Protocol Stack

Protocol Stack Diagram

Group Name: Performance Modeling
Directory: perfmod

Description


Ports

    Input

    Output

Attributes




Message Distributer

Message Distributer Diagram

Group Name: Performance Modeling
Directory: perfmod

Description

The MsgDistributer device routes incomming performance model messages to the output port with a name that matches a particular field in the message.


Ports

    Input

    Output

Attributes




Message Funnel

Message Funnel Diagram

Group Name: Performance Modeling
Directory: perfmod

Description

The MsgFunnel device routes all incomming performance model messages to a single output port named "out".


Ports

    Input

    Output




Hardware Communications Device

Hardware Communications Device Diagram

Group Name: Performance Modeling
Directory: perfmod

Description

The MsgFunnel device routes all incomming performance model messages to a single output port named "out".


Ports

    Input

    Output




Generic Store & Forward Switch

Generic Store & Forward Switch Diagram

Group Name: Performance Modeling
Directory: perfmod

Description

The MsgFunnel device routes all incomming performance model messages to a single output port named "out".


Ports

    Input

    Output




Aron Rubin
Last modified: Mon Apr 9 16:50:21 EDT 2001